論文誌
|
Y. Masuda, T. Onoye, M. Hashimoto
|
Activation-Aware Slack Assignment for Time-To-Failure Extension and Power Saving
|
IEEE Transactions on VLSI Systems
| 26(11)
|
2217--2229
|
2018年11月
|
| pdf
|
論文誌
|
K. Mitsunari, J. Yu, T. Onoye, M. Hashimoto
|
Hardware Architecture for High-Speed Object Detection Using Decision Tree Ensemble
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E101-A(9)
|
1298--1307
|
2018年9月
|
| pdf
|
論文誌
|
R. Doi, M. Hashimoto, T. Onoye
|
An Analytic Evaluation on Soft Error Immunity Enhancement Due to Temporal Triplication
|
International Journal of Embedded Systems
| 10(1)
|
22-31
|
2018年1月
|
|
|
論文誌
|
Y. Masuda, T. Onoye, M. Hashimoto
|
Performance Evaluation of Software-Based Error Detection Mechanisms for Supply Noise Induced Timing Errors
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E100-A(7)
|
1452--1463
|
2017年7月
|
| pdf
|
論文誌
|
S. Iizuka, Y. Higuchi, M. Hashimoto, T. Onoye
|
Device-Parameter Estimation with Sensitivity-Configurable Ring Oscillator
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E98-A(12)
|
2607--2613
|
2015年12月
|
|
|
論文誌
|
T. Shinada, M. Hashimoto, T. Onoye
|
Proximity Distance Estimation Based on Electric Field Communication between 1mm³ Sensor Nodes
|
Analog Integrated Circuits and Signal Processing
|
|
|
2015年5月
|
| 220.pdf
|
論文誌
|
S. Hirokawa, R. Harada, M. Hashimoto, T. Onoye
|
Characterizing Alpha- and Neutron-Induced SEU and MCU on SOTB and Bulk 0.4-V SRAMs
|
IEEE Transactions on Nuclear Science
| 62(2)
|
420--427
|
2015年4月
|
| 219.pdf
|
論文誌
|
H. Konoura, D. Alnajjar, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, M. Hashimoto, T. Onoye, H. Onodera
|
Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E97-A(12)
|
2518--2529
|
2014年12月
|
| 210.pdf
|
論文誌
|
T. Amaki, M. Hashimoto, T. Onoye
|
A Process and Temperature Tolerant Oscillator-Based True Random Number Generator
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E97-A(12)
|
2393--2399
|
2014年12月
|
| 208.pdf
|
論文誌
|
H. Konoura, T. Imagawa, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Comparative Evaluation of Lifetime Enhancement with Fault Avoidance on Dynamically Reconfigurable Devices
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E97-A(7)
|
1468--1482
|
2014年7月
|
| 201.pdf
|
論文誌
|
H. Konoura, T. Kameda, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
NBTI Mitigation Method by Inputting Random Scan-In Vectors in Standby Time
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E97-A(7)
|
1483--1491
|
2014年7月
|
| 202.pdf
|
論文誌
|
R. Harada, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
SET Pulse-Width Measurement Suppressing Pulse-Width Modulation and Within-Die Process Variation Effects
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E97-A(7)
|
1461--1467
|
2014年7月
|
| 200.pdf
|
論文誌
|
H. Fuketa, R. Harada, M. Hashimoto, T. Onoye
|
Measurement and Analysis of Alpha-Particle-Induced Soft Errors and Multiple Cell Upsets in 10T Subthreshold SRAM
|
IEEE Transactions on Device and Materials Reliability
| 14(1)
|
463 -- 470
|
2014年3月
|
| 185.pdf
|
論文誌
|
D. Alnajjar, H. Konoura, Y. Ko, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Implementing Flexible Reliability in a Coarse Grained Reconfigurable Architecture
|
IEEE Transactions on VLSI Systems
| 21(12)
|
2165 -- 2178
|
2013年12月
|
| 177.pdf
|
論文誌
|
K. Shinkai, M. Hashimoto, T. Onoye
|
A Gate-Delay Model Focusing on Current Fluctuation Over Wide Range of Process-Voltage-Temperature Variations
|
Integration, the VLSI Journal
| 46(4)
|
345--358
|
2013年9月
|
| 179.pdf
|
論文誌
|
T.Kameda, H. Konoura, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Field Slack Assessment for Predictive Fault Avoidance on Coarse-Grained Reconfigurable Devices
|
IEICE Trans. on Information and Systems
| E96-D(8)
|
1624--1631
|
2013年8月
|
| 191.pdf
|
論文誌
|
T. Amaki, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
A Worst-Case-Aware Design Methodology for Noise-Tolerant Oscillator-Based True Random Number Generator with Stochastic Behavior Modeling
|
IEEE Transactions on Information Forensics and Security
| 8(8)
|
1331--1342
|
2013年8月
|
| 190.pdf
|
論文誌
|
R. Harada, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Impact of NBTI-Induced Pulse-Width Modulation on SET Pulse-Width Measurement
|
IEEE Transactions on Nuclear Science
| 60(4)
|
2630--2634
|
2013年8月
|
| 180.pdf
|
論文誌
|
D. Alnajjar, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
PVT-induced Timing Error Detection Through Replica Circuits and Time Redundancy in Reconfigurable Devices
|
IEICE Electronics Express (ELEX)
| 10(5)
|
|
2013年4月
|
| 184.pdf
|
論文誌
|
Y. Ogasahara, M. Hashimoto, T. Kanamoto, T. Onoye
|
Supply Noise Suppression by Triple-Well Structure
|
IEEE Transactions on VLSI Systems
| 21(4)
|
781--785
|
2013年4月
|
| 169.pdf
|
論文誌
|
I. Homjakovs, T. Hirose, Y. Osaki, M. Hashimoto, T. Onoye
|
A 0.8-V 110-nA CMOS Current Reference Circuit Using Subthreshold Operation
|
IEICE Electronics Express (ELEX)
| 10(4)
|
|
2013年3月
|
| 182.pdf
|
論文誌
|
T. Amaki, M. Hashimoto, T. Onoye
|
Jitter Amplifier for Oscillator-Based True Random Number Generator
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E96-A(3)
|
684--696
|
2013年3月
|
| 181.pdf
|
論文誌
|
I. Homjakovs, M. Hashimoto, T. Hirose, T. Onoye
|
Signal-Dependent Analog-To-Digital Conversion Based on MINIMAX Sampling
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E96-A(2)
|
459--468
|
2013年2月
|
| 178.pdf
|
論文誌
|
Y. Takai, M. Hashimoto, T. Onoye
|
Power Gating Implementation for Supply Noise Mitigation with Body-Tied Triple-Well Structure
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E95-A(12)
|
2220--2225
|
2012年12月
|
| 172.pdf
|
論文誌
|
S. Kimura, M. Hashimoto, T. Onoye
|
A Body Bias Clustering Method for Low Test-Cost Post-Silicon Tuning
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E95-A(12)
|
2292--2300
|
2012年12月
|
| 173.pdf
|
論文誌
|
H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
Adaptive Performance Compensation with In-Situ Timing Error Predictive Sensors for Subthreshold Circuits
|
IEEE Transactions on VLSI Systems
| 20(2)
|
333--343
|
2012年2月
|
| 155.pdf
|
論文誌
|
H. Konoura, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Stress Probability Computation for Estimating NBTI-Induced Delay Degradation
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E94-A(12)
|
2545--2553
|
2011年12月
|
| 166.pdf
|
論文誌
|
K. Shinkai, M. Hashimoto, T. Onoye
|
Extracting Device-Parameter Variations with RO-Based Sensors
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E94-A(12)
|
2537--2544
|
2011年12月
|
| 165.pdf
|
論文誌
|
H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
Neutron-Induced Soft Errors and Multiple Cell Upsets in 65-nm 10T Subthreshold SRAM
|
IEEE Transactions on Nuclear Science
| 58(4)
|
2097--2102
|
2011年8月
|
| 159.pdf
|
論文誌
|
H. Fuketa, D. Kuroda, M. Hashimoto, T. Onoye
|
An Average-Performance-Oriented Subthreshold Processor Self-Timed by Memory Read Completion
|
IEEE Transactions on Circuits and Systems II
| 58(5)
|
299--303
|
2011年5月
|
| 158.pdf
|
論文誌
|
R. Harada, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Measurement Circuits for Acquiring SET Pulse Width Distribution with Sub-FO1-inverter-delay Resolution
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E93-A(12)
|
2417--2423
|
2010年12月
|
| 149.pdf
|
論文誌
|
H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
Transistor Variability Modeling and Its Validation with Ring-Oscillation Frequencies for Body-Biased Subthreshold Circuits
|
IEEE Transactions on VLSI Systems
| 18(7)
|
1118--1129
|
2010年7月
|
| 130.pdf
|
論文誌
|
K. Shinkai, M. Hashimoto, T. Onoye
|
Prediction of Self-Heating in Short Intra-Block Wires
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E93-A(3)
|
583--594
|
2010年3月
|
| 135.pdf
|
論文誌
|
H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E92-A(12)
|
3094--3102
|
2009年12月
|
| 128.pdf
|
論文誌
|
Y. Ogasahara, M. Hashimoto, T. Onoye
|
All Digital Ring-Oscillator Based Macro for Sensing Dynamic Supply Noise Waveform
|
IEEE Journal of Solid-State Circuits
| 44(6)
|
1745--1755
|
2009年6月
|
| 124.pdf
|
論文誌
|
K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability
|
IEICE Trans. on Electronics
| E92-C(2)
|
281--285
|
2009年2月
|
| 117.pdf
|
論文誌
|
S. Abe, M. Hashimoto, T. Onoye
|
Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E91-A(12)
|
3481-3487
|
2008年12月
|
| 112.pdf
|
論文誌
|
Y. Mitsuyama, K. Takahashi, R. Imai, M. Hashimoto, T. Onoye, I. Shirakawa
|
Area-Efficient Reconfigurable Architecture for Media Processing
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E91-A(12)
|
3651-3662
|
2008年12月
|
| 114.pdf
|
論文誌
|
Y. Ogasahara, M. Hashimoto, T. Onoye
|
Measurement and Analysis of Inductive Coupling Noise in 90nm Global Interconnects
|
IEEE Journal of Solid-State Circuits
| 43(3)
|
718--728
|
2008年3月
|
| 99.pdf
|
論文誌
|
Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, T. Onoye
|
Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop with On-Chip Delay Measurement
|
IEEE Transactions on Circuits and Systems II
| 54(10)
|
868--872
|
2007年10月
|
| 94.pdf
|
論文誌
|
Y. Ogasahara, M. Hashimoto, T. Onoye
|
Quantitative Prediction of On-Chip Capacitive and Inductive Crosstalk Noise and Tradeoff between Wire Cross-Sectional Area and Inductive Crosstalk Effect
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E90-A(4)
|
724--731
|
2007年4月
|
| 80.pdf
|
国際会議
|
K. Hirosue, S. Ukawa, Y. Itoh, T. Onoye, M. Hashimoto
|
GPGPU-based Highly Parallelized 3D Node Localization for Real-Time 3D Model Reproduction
|
Proceedings of International Conference on Intelligent User Interfaces (IUI)
|
|
173--178
|
2017年3月
|
| pdf
|
国際会議
|
Y. Masuda, M. Hashimoto, T. Onoye
|
Critical Path Isolation for Time-To-Failure Extension and Lower Voltage Operation
|
Proceedings of International Conference on Computer-Aided Design (ICCAD)
|
|
|
2016年11月
|
| 230.pdf
|
国際会議
|
Y. Masuda, M. Hashimoto, T. Onoye
|
Hardware-Simulation Correlation of Timing Error Detection Performance of Software-Based Error Detection Mechanisms
|
Proceedings of International On-Line Testing Symposium (IOLTS)
|
|
84--89
|
2016年7月
|
| 228.pdf
|
国際会議
|
Y. Masuda, M. Hashimoto, T. Onoye
|
Measurement of Timing Error Detection Performance of Software-Based Error Detection Mechanisms and Its Correlation with Simulation
|
ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU)
|
|
|
2016年3月
|
|
|
国際会議
|
Y. Masuda, M. Hashimoto, T. Onoye
|
Performance Evaluation of Software-Based Error Detection Mechanisms for Localizing Electrical Timing Failures under Dynamic Supply Noise
|
Proceedings of International Conference on Computer-Aided Design (ICCAD)
|
|
315-322
|
2015年11月
|
| 224.pdf
|
国際会議
|
R. Doi, M. Hashimoto, T. Onoye
|
An Analytic Evaluation on Soft Error Immunity Enhancement Due to Temporal Triplication
|
Proceedings of IEEE Pacific Rim International Symposium on Dependable Computing (PRDC)
|
|
|
2015年11月
|
|
|
国際会議
|
S. Iizuka, Y. Masuda, M. Hashimoto, T. Onoye
|
Stochastic Timing Error Rate Estimation under Process and Temporal Variations
|
Proceedings of International Test Conference (ITC)
|
|
|
2015年10月
|
| 223.pdf
|
国際会議
|
M. Ueno, M. Hashimoto, T. Onoye
|
Real-Time On-Chip Supply Voltage Sensor and Its Application to Trace-Based Timing Error Localization
|
Proceedings of International On-Line Testing Symposium (IOLTS)
|
|
188--193
|
2015年7月
|
| 222.pdf
|
国際会議
|
S. Ukawa, T. Shinada, M. Hashimoto, Y. Itoh, T. Onoye
|
3D Node Localization from Node-To-Node Distance Information Using Cross-Entropy Method
|
Proceedings of Virtual Reality Conference (VR)
|
|
|
2015年3月
|
| 218.pdf
|
国際会議
|
S. Iizuka, Y. Higuchi, M. Hashimoto, T. Onoye
|
Area Efficient Device-Parameter Estimation Using Sensitivity-Configurable Ring Oscillator
|
Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
|
|
731--736
|
2015年1月
|
| 214.pdf
|
国際会議
|
M. Hashimoto, D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, T. Onoye, H. Onodera
|
Reliability-Configurable Mixed-Grained Reconfigurable Array Compatible with High-Level Synthesis
|
Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
|
|
14--15
|
2015年1月
|
| 213.pdf
|
国際会議
|
T. Amaki, M. Hashimoto, T. Onoye
|
An Oscillator-Based True Random Number Generator with Process and Temperature Tolerance
|
Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
|
|
4--5
|
2015年1月
|
| 212.pdf
|
国際会議
|
A. Iokibe, M. Hashimoto, T. Onoye
|
Feasibility Evaluation on an Instant Invader Detection System with Ultrasonic Sensors Scattered on the Ground
|
Proceedings of International Conference on Sensing Technology (ICST)
|
|
188--193
|
2014年9月
|
| 204.pdf
|
国際会議
|
M. Ueno, M. Hashimoto, T. Onoye
|
Trace-Based Fault Localization with Supply Voltage Sensor
|
ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU)
|
|
77--81
|
2014年3月
|
|
|
国際会議
|
H. Konoura, D. Alnajjar, Y. Mitsuyama, H. Ochi, T. Imagawa, S. Noda, K. Wakabayashi, M. Hashimoto, T. Onoye
|
Mixed-Grained Reconfigurable Architecture Supporting Flexible Reliability and C-Based Design
|
Proceedings of International Conference on ReConFigurable Computing and FPGAs (ReConFig)
|
|
|
2013年12月
|
| 199.pdf
|
国際会議
|
S. Iizuka, M. Mizuno, D. Kuroda, M. Hashimoto, T. Onoye
|
Stochastic Error Rate Estimation for Adaptive Speed Control with Field Delay Testing
|
Proceedings of International Conference on Computer-Aided Design (ICCAD)
|
|
107--114
|
2013年11月
|
| 193.PDF
|
国際会議
|
J. Kono, M. Hashimoto, T. Onoye
|
Feasibility Evaluation of Near-Field Communication in Clay with 1-mm^3 Antenna
|
Proceedings of Asia-Pacific Microwave Conference (APMC)
|
|
1121--1123
|
2013年11月
|
| 194.pdf
|
国際会議
|
T. Amaki, M. Hashimoto, T. Onoye
|
A Process and Temperature Tolerant Oscillator-Based True Random Number Generator with Dynamic 0/1 Bias Correction
|
Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC)
|
|
133--136
|
2013年11月
|
| 195.pdf
|
国際会議
|
D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, S. Noda, K. Wakabayashi, M. Hashimoto, T. Onoye, H. Onodera
|
Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-To-Array Mapping and Its Radiation Testing
|
Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC)
|
|
313--316
|
2013年11月
|
| 196.pdf
|
国際会議
|
R. Harada, M. Hashimoto, T. Onoye
|
NBTI Characterization Using Pulse-Width Modulation
|
IEEE/ACM Workshop on Variability Modeling and Characterization
|
|
|
2013年11月
|
|
|
国際会議
|
T. Shinada, M. Hashimoto, T. Onoye
|
Proximity Distance Estimation Based on Capacitive Coupling between 1mm^3 Sensor Nodes
|
Proceedings of International NEWCAS Conference
|
|
|
2013年6月
|
| 188.pdf
|
国際会議
|
M. Ueno, M. Hashimoto, T. Onoye
|
Real-Time Supply Voltage Sensor for Detecting/Debugging Electrical Timing Failures
|
Proceedings of Reconfigurable Architectures Workshop (RAW)
|
|
301--305
|
2013年5月
|
| 187.pdf
|
国際会議
|
D. Alnajjar, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Static Voltage Over-Scaling and Dynamic Voltage Variation Tolerance with Replica Circuits and Time Redundancy in Reconfigurable Devices
|
Proceedings of International Conference on ReConFigurable Computing and FPGAs (ReConFig)
|
|
|
2012年12月
|
| 174.pdf
|
国際会議
|
I. Homjakovs, M. Hashimoto, T. Hirose, T. Onoye
|
Signal-Dependent Analog-To-Digital Converter Based on MINIMAX Sampling
|
Proceedings of International SoC Design Conference (ISOCC)
|
|
120 -- 123
|
2012年11月
|
| 176.pdf
|
国際会議
|
R. Harada, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Impact of NBTI-Induced Pulse-Width Modulation on SET Pulse-Width Measurement
|
Proceedings of European Conference on Radiation and Its Effects on Components and Systems (RADECS)
|
|
|
2012年9月
|
|
|
国際会議
|
T. Kameda, H. Konoura, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
A Predictive Delay Fault Avoidance Scheme for Coarse-Grained Reconfigurable Architecture
|
Proceedings of International Conference on Field Programmable Logic and Applications (FPL)
|
|
|
2012年8月
|
| 170.pdf
|
国際会議
|
R. Harada, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
SET Pulse-Width Measurement Eliminating Pulse-Width Modulation and Within-Die Process Variation Effects
|
Proceedings of International Reliability Physics Symposium (IRPS)
|
|
|
2012年4月
|
| 168.PDF
|
国際会議
|
S. Kimura, M. Hashimoto, T. Onoye
|
Body Bias Clustering for Low Test-Cost Post-Silicon Tuning
|
Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
|
|
283--289
|
2012年2月
|
| 167.pdf
|
国際会議
|
H. Konoura, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Implications of Reliability Enhancement Achieved by Fault Avoidance on Dynamically Reconfigurable Architecture
|
Proceedings of International Conference on Field Programmable Logic and Applications (FPL)
|
|
189--194
|
2011年9月
|
| 162.pdf
|
国際会議
|
Y. Takai, M. Hashimoto, T. Onoye
|
Power Gating Implementation for Noise Mitigation with Body-Tied Triple-Well Structure
|
Proceedings of IEEE Custom Integrated Circuits Conference (CICC)
|
|
|
2011年9月
|
| 163.pdf
|
国際会議
|
T. Kameda, H. Konoura, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
NBTI Mitigation by Giving Random Scan-In Vectors During Standby Mode
|
Proceedings of International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS)
|
|
152--161
|
2011年9月
|
|
|
国際会議
|
I. Homjakovs, M. Hashimoto, T. Hirose, T. Onoye
|
Signal-Dependent Analog-To-Digital Conversion Based on MINIMAX Sampling
|
Proceedings of International Midwest Symposium on Circuits and Systems (MWSCAS)
|
|
|
2011年8月
|
| 161.pdf
|
国際会議
|
T. Amaki, M. Hashimoto, T. Onoye
|
An Oscillator-Based True Random Number Generator with Jitter Amplifier
|
Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS)
|
|
725--728
|
2011年5月
|
| 157.pdf
|
国際会議
|
R. Harada, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Neutron Induced Single Event Multiple Transients with Voltage Scaling and Body Biasing
|
Proceedings of International Reliability Physics Symposium (IRPS)
|
|
253--257
|
2011年4月
|
| 156.PDF
|
国際会議
|
S. Kimura, M. Hashimoto, T. Onoye
|
Body Bias Clustering for Low Test-Cost Post-Silicon Tuning
|
ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU)
|
|
46--51
|
2011年4月
|
|
|
国際会議
|
K. Shinkai, M. Hashimoto, T. Onoye
|
Extracting Device-Parameter Variations with RO-Based Sensors
|
ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU)
|
|
13--18
|
2011年3月
|
|
|
国際会議
|
D. Alnajjar, H. Kounoura, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
MTTF Measurement under Alpha Particle Radiation in a Coarse-Grained Reconfigurable Architecture with Flexible Reliability
|
IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE)
|
|
|
2011年3月
|
|
|
国際会議
|
T. Amaki, M. Hashimoto, T. Onoye
|
Jitter Amplifier for Oscillator-Based True Random Number Generator
|
Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
|
|
81--82
|
2011年1月
|
| 153.pdf
|
国際会議
|
Y. Takai, M. Hashimoto, T. Onoye
|
Evaluation of Power Gating Structures Focusing on Power Supply Noise with Measurement and Simulation
|
Proceedings of IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)
|
|
213--216
|
2010年10月
|
| 146.pdf
|
国際会議
|
T. Amaki, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
A Design Procedure for Oscillator-Based Hardware Random Number Generator with Stochastic Behavior Modeling
|
Proceedings of International Workshop on Information Security Applications (WISA)
|
|
107-121
|
2010年8月
|
|
|
国際会議
|
H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
Alpha-Particle-Induced Soft Errors and Multiple Cell Upsets in 65-nm 10T Subthreshold SRAM
|
Proceedings of International Reliability Physics Symposium (IRPS)
|
|
213--217
|
2010年5月
|
| 140.PDF
|
国際会議
|
S. Abe, K. Shinkai, M. Hashimoto, T. Onoye
|
Clock Skew Reduction by Self-Compensating Manufacturing Variability with On-Chip Sensors
|
ACM Great Lake Symposium on VLSI (GLSVLSI)
|
|
197--202
|
2010年5月
|
| 143.pdf
|
国際会議
|
Y. Takai, Y. Ogasahara, M. Hashimoto, T. Onoye
|
Measurement of On-Chip I/O Power Supply Noise and Correlation Verification between Noise Magnitude and Delay Increase Due to SSO
|
Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI)
|
|
19--20
|
2010年5月
|
| 139.pdf
|
国際会議
|
D. Kuroda, H. Fuketa, M. Hashimoto, T. Onoye
|
A 16-Bit RISC Processor with 4.18pJ/cycle at 0.5V Operation
|
Proceedings of IEEE COOL Chips
|
|
190
|
2010年4月
|
| 145.pdf
|
国際会議
|
H. Konoura, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Comparative Study on Delay Degrading Estimation Due to NBTI with Circuit/Instance/Transistor-Level Stress Probability Consideration
|
Proceedings of International Symposium on Quality Electronic Design (ISQED)
|
|
646--651
|
2010年3月
|
| 137.pdf
|
国際会議
|
R. Harada, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Measurement Circuits for Acquiring SET Pulse Width Distribution with Sub-FO1-inverter-delay Resolution
|
Proceedings of International Symposium on Quality Electronic Design (ISQED)
|
|
839--844
|
2010年3月
|
| 138.pdf
|
国際会議
|
S. Abe, K. Shinkai, M. Hashimoto, T. Onoye
|
Clock Skew Reduction by Self-Compensating Manufacturing Variability with On-Chip Sensors
|
ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU)
|
|
89--94
|
2010年3月
|
|
|
国際会議
|
H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
Adaptive Performance Control with Embedded Timing Error Predictive Sensors for Subthreshold Circuits
|
Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
|
|
361 -- 362
|
2010年1月
|
| 131.pdf
|
国際会議
|
D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, T. Onoye
|
Soft Error Resilient VLSI Architecture for Signal Processing
|
Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)
|
|
183--186
|
2009年12月
|
| 142.pdf
|
国際会議
|
H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
Adaptive Performance Compensation with In-Situ Timing Error Prediction for Subthreshold Circuits
|
Proceedings of IEEE Custom Integrated Circuits Conference (CICC)
|
|
215--218
|
2009年9月
|
| 127.pdf
|
国際会議
|
K. Hamamoto, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
Tuning-Friendly Body Bias Clustering for Compensating Random Variability in Subthreshold Circuits
|
Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)
|
|
51--56
|
2009年8月
|
| 125.pdf
|
国際会議
|
D. Alnajjar, Y. Ko, T. Imagawa, H. Konoura, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, T. Onoye
|
Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability
|
Proceedings of International Conference on Field Programmable Logic and Applications (FPL)
|
|
186--192
|
2009年8月
|
| 133.pdf
|
国際会議
|
Y. Ko, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, T. Onoye
|
Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability
|
Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI)
|
|
236--241
|
2009年3月
|
|
|
国際会議
|
D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, T. Onoye
|
A Coarse-Grained Dynamically Reconfigurable Architecture Enabling Flexible Reliability
|
Proceedings of IEEE Workshop on System Effects of Logic Soft Errors (SELSE)
|
|
|
2009年3月
|
|
|
国際会議
|
H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction
|
Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
|
|
266-271
|
2009年1月
|
| 116.pdf
|
国際会議
|
Y. Ogasahara, M. Hashimoto, T. Kanamoto, T. Onoye
|
Measurement of Supply Noise Suppression by Substrate and Deep N-Well in 90nm Process
|
Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC)
|
|
397--400
|
2008年11月
|
| 109.pdf
|
国際会議
|
H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
Vth Variation Modeling and Its Validation with Ring Oscillation Frequencies for Body-Biased Circuits and Subthreshold Circuits
|
Proceedings of Workshop on Test Structure Design for Variability Characterization
|
|
|
2008年11月
|
|
|
国際会議
|
H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
Correlation Verification between Transistor Variability Model with Body Biasing and Ring Oscillation Frequency in 90nm Subthreshold Circuits
|
Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)
|
|
3--8
|
2008年8月
|
| 106.pdf
|
国際会議
|
K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
Experimental Study on Body-Biasing Layout Style -- Negligible Area Overhead Enables Sufficient Speed Controllability --
|
Proceedings of ACM Great Lake Symposium on VLSI (GLSVLSI)
|
|
387--390
|
2008年5月
|
| 104.pdf
|
国際会議
|
S. Abe, M. Hashimoto, T. Onoye
|
Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution
|
Proceedings of International Symposium on Quality Electronic Design (ISQED)
|
|
520--525
|
2008年3月
|
| 102.PDF
|
国際会議
|
Y. Ogasahara, M. Hashimoto, T. Onoye
|
Dynamic Supply Noise Measurement Circuit Composed of Standard Cells Suitable for In-Site SoC Power Integrity Verification
|
Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
|
|
107--108
|
2008年1月
|
| 97.pdf
|
国際会議
|
K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
|
A Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed
|
Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI)
|
|
233-237
|
2007年10月
|
|
|
国際会議
|
Y. Ogasahara, M. Hashimoto, T. Onoye
|
Dynamic Supply Noise Measurement with All Digital Gated Oscillator for Evaluating Decoupling Capacitance Effect
|
Proceedings of IEEE Custom Integrated Circuits Conference (CICC)
|
|
783--786
|
2007年9月
|
| 90.pdf
|
国際会議
|
K. Shinkai, M. Hashimoto, T. Onoye
|
Future Prediction of Self-Heating in Short Intra-Block Wires
|
Proceedings of International Symposium on Quality Electronic Design (ISQED)
|
|
660-665
|
2007年3月
|
| 82.PDF
|
国際会議
|
K. Shinkai, M. Hashimoto, A. Kurokawa, T. Onoye
|
A Gate Delay Model Focusing on Current Fluctuation Over Wide-Range of Process and Environmental Variability
|
Proceedings of ACM/IEEE International Conference on Computer-Aided Design (ICCAD)
|
|
47-53
|
2006年11月
|
| 22.pdf
|
国際会議
|
Y. Ogasahara, M. Hashimoto, T. Onoye
|
Quantitative Prediction of On-Chip Capacitive and Inductive Crosstalk Noise and Discussion on Wire Cross-Sectional Area Toward Inductive Crosstalk Free Interconnects
|
Proceedings of IEEE International Conference on Computer Design (ICCD)
|
|
70-75
|
2006年10月
|
| 23.pdf
|
国際会議
|
Y. Ogasahara, M. Hashimoto, T. Onoye
|
Measurement of Inductive Coupling Effect on Timing in 90nm Global Interconnects
|
Proceedings of IEEE Custom Integrated Circuits Conference (CICC)
|
|
721-724
|
2006年9月
|
| 24.pdf
|
国際会議
|
Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, T. Onoye
|
Measurement Results of Delay Degradation Due to Power Supply Noise Well Correlated with Full-Chip Simulation
|
Proceedings of IEEE Custom Integrated Circuits Conference (CICC),
|
|
861-864
|
2006年9月
|
| 25.pdf
|
国際会議
|
K. Shinkai, M. Hashimoto, A. Kurokawa, T. Onoye
|
A Gate Delay Model Focusing on Current Fluctuation Over Wide-Range of Process Variations
|
ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU)
|
|
59-64
|
2006年2月
|
|
|
国際会議
|
Y. Ogasahara, M. Hashimoto, T. Onoye
|
Measurement and Analysis of Delay Variation Due to Inductive Coupling
|
Proceedings of IEEE Custom Integrated Circuits Conference (CICC)
|
|
305-308
|
2005年9月
|
| 26.pdf
|
国内会議(査読付き)
|
小笠原 泰弘, 橋本 昌宜, 尾上 孝雄
|
LSI 配線における容量性, 誘導性クロストークノイズの定量的将来予測
|
第19回 回路とシステム(軽井沢)ワークショップ
|
|
5-10
|
2006年4月
|
| 73.pdf
|
国内会議(査読付き)
|
新開 健一, 橋本 昌宜, 黒川 敦, 尾上 孝雄
|
電流変動に着目した広範囲な製造・環境ばらつき対応ゲート遅延モデル
|
第19回 回路とシステム(軽井沢)ワークショップ
|
|
559-564
|
2006年4月
|
| 75.pdf
|
研究会・全国大会等
|
S. Iizuka, Y. Higuchi, M. Hashimoto, T. Onoye
|
Area Efficient Device-Parameter Estimation Using Sensitivity-Configurable Ring Oscillator
|
電子情報通信学会 VLSI設計技術研究会
|
|
|
2015年3月
|
|
|
研究会・全国大会等
|
M. Hashimoto, M. Ueno, T. Onoye
|
Real-Time Supply Voltage Sensor for Trace-Based Fault Localization
|
Poster Session, International Test Conference (ITC)
|
|
|
2014年10月
|
|
|
研究会・全国大会等
|
I. Homjakovs, M. Hashimoto, T. Hirose, T. Onoye
|
Signal-Dependent Analog-To-Digital Conversion Based on Minimax
|
電子情報通信学会 集積回路研究会
| ( ICD2011-121)
|
105--107
|
2011年12月
|
|
|
研究会・全国大会等
|
小笠原泰弘, 橋本昌宜, 尾上孝雄
|
90nm グローバル配線における誘導性クロストークノイズによる遅延変動の実測
|
電子情報通信学会 集積回路研究会
| (ICD2006-173)
|
|
2007年1月
|
|
|
研究会・全国大会等
|
Jangsombatsiri Siriporn, 橋本昌宜, 尾上孝雄
|
シャントコンダクタンスを挿入したオンチップ伝送線路特性評価
|
第十回シリコンアナログRF研究会
|
|
|
2006年11月
|
|
|
研究会・全国大会等
|
新開健一, 橋本昌宜, 尾上孝雄
|
短距離ブロック内配線の自己発熱問題の将来予測
|
2006年電子情報通信学会ソサイエティ大会講演論文集
| (A-3-14)
|
|
2006年9月
|
| 72.pdf
|
研究会・全国大会等
|
榎並孝司, 橋本昌宜, 尾上孝雄
|
電源ノイズ解析のための回路動作部表現法の評価
|
2006年電子情報通信学会総合大会講演論文集
| (A-3-15)
|
|
2006年3月
|
| 77.pdf
|
研究会・全国大会等
|
小笠原泰弘, 橋本昌宜, 尾上孝雄
|
誘導性・容量性クロストークノイズによる遅延変動の測定と評価
|
電子情報通信学会 集積回路研究会
| (ICD2005-74)
|
|
2005年8月
|
|
|
著書
|
E. Ibe, S. Yoshimoto, M. Yoshimoto, H. Kawaguchi, K. Kobayashi, J. Furuta, Y. Mitsuyama, M. Hashimoto, T. Onoye, H. Kanbara, H. Ochi, K. Wakabayashi, H. Onodera, M. Sugihara
|
Radiation-Induced Soft Errors
|
Book chapter, VLSI Design and Test for Systems Dependability, Springer
|
|
|
2018年8月
|
|
|
