: D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, Soft Error Resilient VLSI Architecture for Signal Processing, December 2009.
Detail of a work
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| D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "Soft Error Resilient VLSI Architecture for Signal Processing," Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 183--186, December 2009. | |
| ID | 253 |
| 分類 | 国際会議 |
| タグ | architecture error processing resilient signal soft vlsi |
| 表題 (title) |
Soft Error Resilient VLSI Architecture for Signal Processing |
| 表題 (英文) |
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| 著者名 (author) |
D. Alnajjar,Y. Ko,T. Imagawa,M. Hiromoto,Y. Mitsuyama,M. Hashimoto,H. Ochi,T. Onoye |
| 英文著者名 (author) |
D. Alnajjar,Y. Ko,T. Imagawa,M. Hiromoto,Y. Mitsuyama,M. Hashimoto,H. Ochi,T. Onoye |
| キー (key) |
D. Alnajjar,Y. Ko,T. Imagawa,M. Hiromoto,Y. Mitsuyama,M. Hashimoto,H. Ochi,T. Onoye |
| 定期刊行物名 (journal) |
Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS) |
| 定期刊行物名 (英文) |
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| 巻数 (volume) |
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| 号数 (number) |
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| ページ範囲 (pages) |
183--186 |
| 刊行月 (month) |
12 |
| 出版年 (year) |
2009 |
| Impact Factor (JCR) |
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| URL |
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| 付加情報 (note) |
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| 注釈 (annote) |
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| 内容梗概 (abstract) |
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| 論文電子ファイル | 142.pdf (application/pdf) [一般閲覧可] |
| BiBTeXエントリ |
@article{id253,
title = {Soft Error Resilient {VLSI} Architecture for Signal Processing},
author = {D. Alnajjar and Y. Ko and T. Imagawa and M. Hiromoto and Y. Mitsuyama and M. Hashimoto and H. Ochi and T. Onoye},
journal = {Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)},
pages = {183--186},
month = {12},
year = {2009},
}
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