List of works
この検索内の頻出タグ: detection:8 error:3 hardware:3 object:3 architecture:2 control:2 fault:2 timing:2 aggregated:1 analysis:1 channel:1 circuits:1 computing:1 concurrent:1 crossbar:1 decision:1 devices:1 diagnosis:1 ensemble:1 errors:1 evaluation:1 failures:1 fast:1 features:1 flow-related:1 fpga:1 general:1 gpu:1 gpus:1 high-speed:1
- 論文誌
- [1] R. Doi, X. Bai, T. Sakamoto, and M. Hashimoto, "A Fault Detection and Diagnosis Method for Via-Switch Crossbar in Non-Volatile FPGA," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume 103-A, number 12, pages 1447--1455, December 2020. [pdf]
- [2] K. Mitsunari, J. Yu, T. Onoye, and M. Hashimoto, "Hardware Architecture for High-Speed Object Detection Using Decision Tree Ensemble," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E101-A, number 9, pages 1298--1307, September 2018. [pdf]
- [3] Y. Masuda, T. Onoye, and M. Hashimoto, "Performance Evaluation of Software-Based Error Detection Mechanisms for Supply Noise Induced Timing Errors," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E100-A, number 7, pages 1452--1463, July 2017. [pdf]
- [4] D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "PVT-induced Timing Error Detection Through Replica Circuits and Time Redundancy in Reconfigurable Devices," IEICE Electronics Express (ELEX), volume 10, number 5, April 2013. [184.pdf]
- 国際会議
- [1] T. Tanaka, T. Uezono, K. Suenaga, and M. Hashimoto, "Hardware Error Detection with In-Situ Monitoring of Control Flow-Related Specifications," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), 966 - 973, January 2025. [pdf]
- [2] H. Itsuji, T. Uezono, T. Toba, K. Ito, and M. Hashimoto, "Concurrent Detection of Failures in GPU Control Logic for Reliable Parallel Computing," Proceedings of International Test Conference (ITC), November 2020. [pdf]
- [3] Y. Zhang, K. Ito, H. Itsuji, T. Uezono, T. Toba, and M. Hashimoto, "Fault Mode Analysis of Neural Network-Based Object Detection on GPUs with Neutron Irradiation Test," Proceedings of European Conference on Radiation and Its Effects on Components and Systems (RADECS), October 2020.
- [4] K. Mitsunari, J. Yu, and M. Hashimoto, "Hardware Architecture for Fast General Object Detection Using Aggregated Channel Features," Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pages 55-58, November 2018. [pdf]