Academic Journal
|
, M. Hashimoto
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B2N2: Resource Efficient Bayesian Neural Network Accelerator Using Bernoulli Sampler on FPGA
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Integration, the VLSI Journal
| 89
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1-8
|
March 2023
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| pdf
|
Academic Journal
|
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Via-Switch FPGA with Transistor-Free Programmability Enabling Energy-Efficient Near-Memory Parallel Computation
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Japanese Journal of Applied Physics
| 61(SM0804)
|
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October 2022
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| pdf
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Academic Journal
|
, N. Banno, M. Miyamura, , K. Okamoto, , N. Iguchi, M. Hashimoto, T. Sugibayashi, T. Sakamoto, M. Tada
|
Via-Switch FPGA: 65nm CMOS Implementation and Evaluation
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IEEE Journal of Solid-State Circuits
| 57(7)
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2250-2262
|
July 2022
|
| pdf
|
Academic Journal
|
, W. Liao, M. Hashimoto, Y. Mitsuyama
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Impact of Neutron-Induced SEU in FPGA CRAM on Image-Based Lane Tracking for Autonomous Driving: from Bit Upset to SEFI and Erroneous Behavior
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IEEE Transactions on Nuclear Science
| 69(1)
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35--42
|
January 2022
|
| pdf
|
Academic Journal
|
R. Doi, , T. Sakamoto, M. Hashimoto
|
A Fault Detection and Diagnosis Method for Via-Switch Crossbar in Non-Volatile FPGA
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| 103-A(12)
|
1447--1455
|
December 2020
|
| pdf
|
Academic Journal
|
R. Doi, J. Yu, M. Hashimoto
|
Sneak Path Free Reconfiguration with Minimized Programming Steps for Via-Switch Crossbar Based FPGA
|
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| 39(10)
|
2572--2587
|
October 2020
|
| pdf
|
Academic Journal
|
N. Banno, K. Okamoto, N. Iguchi, H. Ochi, H. Onodera, M. Hashimoto, T. Sugibayashi, T. Sakamoto, M. Tada
|
Low-Power Crossbar Switch with Two-Varistors Selected Complementary Atom Switch (2V-1CAS; Via-Switch) for Nonvolatile FPGA
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IEEE Transactions on Electron Devices
| 66(8)
|
3331--3336
|
August 2019
|
| pdf
|
Academic Journal
|
H. Ochi, K. Yamaguchi, T. Fujimoto, J. Hotate, T. Kishimoto, T. Higashi, T. Imagawa, R. Doi, M. Tada, T. Sugibayashi, W. Takahashi, K. Wakabayashi, H. Onodera, Y. Mitsuyama, J. Yu, M. Hashimoto
|
Via-Switch FPGA: Highly-Dense Mixed-Grained Reconfigurable Architecture with Overlay Via-Switch Crossbars
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IEEE Transactions on VLSI Systems
| 26(12)
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2723--2736
|
December 2018
|
| pdf
|
International Conference
|
, M. Hashimoto, M. Miyamura, , T. Sakamoto, H. Ochi
|
Memory and Energy Savings in the FPGA Implementation of Keyword Spotting with Stream Processing
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Proceedings of Asia Pacific Conference on Circuits and Systems (APCCAS)
|
|
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(accepted, to appear)
|
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International Conference
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T. Imagawa, J. Yu, M. Hashimoto, H. Ochi
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MUX Granularity-Oriented Iterative Technology Mapping for Implementing Compute-Intensive Applications on Via-Switch FPGA
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Proceedings of Design, Automation and Test in Europe Conference (DATE)
|
|
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February 2021
|
| pdf
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International Conference
|
, N. Banno, M. Miyamura, , K. Okamoto, , N. Iguchi, M. Hashimoto, T. Sugibayashi, T. Sakamoto, M. Tada
|
1.5x Energy-Efficient and 1.4x Operation-Speed Via-Switch FPGA with Rapid and Low-Cost ASIC Migration by Via-Switch Copy
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Technical Digest of VLSI Symposium on Technology
|
|
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June 2020
|
| pdf
|
International Conference
|
, M. Hashimoto
|
BYNQNet: Bayesian Neural Network with Quadratic Activations for Sampling-Free Uncertainty Estimation on FPGA
|
Proceedings of Design, Automation and Test in Europe Conference (DATE)
|
|
|
April 2020
|
| pdf
|
International Conference
|
R. Doi, , T. Sakamoto, M. Hashimoto
|
Fault Diagnosis of Via-Switch Crossbar in Non-Volatile FPGA
|
Proceedings of Design, Automation and Test in Europe Conference (DATE)
|
|
|
April 2020
|
| pdf
|
International Conference
|
M. Hashimoto, , N. Banno, M. Tada, T. Sakamoto, J. Yu, R. Doi, , H. Onodera, T. Imagawa, H. Ochi, K. Wakabayashi, Y. Mitsuyama, T. Sugibayashi
|
Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for AI Applications
|
Technical Digest of International Solid-State Circuits Conference (ISSCC)
|
|
502--503
|
February 2020
|
| pdf
|
International Conference
|
, N. Banno, K. Okamoto, N. Iguchi, H. Hada, M. Hashimoto, T. Sugibayashi, T. Sakamoto, M. Tada
|
Characterization of Chalcogenide Selectors for Crossbar Switch Used in Nonvolatile FPGA
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Proceedings of Silicon Nanoelectronics Workshop
|
|
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June 2019
|
| pdf
|
International Conference
|
|
Sneak Path Free Reconfiguration of Via-Switch Crossbars Based FPGA
|
Proceedings of ACM/IEEE International Conference on Computer-Aided Design (ICCAD)
|
|
|
November 2018
|
| pdf
|
International Conference
|
R. Doi, M. Hashimoto
|
SAT Encoding-Based Verification of Sneak Path Problem in Via-Switch FPGA
|
Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
|
|
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July 2018
|
| pdf
|
International Conference
|
M. Hashimoto, Y. Nakazawa, R. Doi, J. Yu
|
Interconnect Delay Analysis for RRAM Crossbar Based FPGA (Invited)
|
Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
|
|
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July 2018
|
| pdf
|
Domestic Conference
|
, R. Doi, M. Hashimoto
|
Rc Extraction-Free Wiring Delay Analysis Focusing on Number of On-State Switches for Via-Switch Fpga
|
情報処理学会DAシンポジウム
|
|
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August 2019
|
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Book
|
H. Hihara, A. Iwasaki, M. Hashimoto, H. Ochi, Y. Mitsuyama, H. Onodera, H. Kanbara, K. Wakabayashi, T. Sugibayashi, T. Takenaka, H. Hada, M. Tada, M. Miyamura, T. Sakamoto
|
Atomic Switch FPGA: Application for IoT Sensing Systems in Space
|
Book Chapter, Atomic Switch, Springer
|
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March 2020
|
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