: R. Doi and M. Hashimoto, SAT Encoding-Based Verification of Sneak Path Problem in Via-Switch FPGA, July 2018.
Detail of a work
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| R. Doi and M. Hashimoto, "SAT Encoding-Based Verification of Sneak Path Problem in Via-Switch FPGA," Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2018. | |
| ID | 478 |
| 分類 | 国際会議 |
| タグ | encoding-based fpga path problem sat sneak verification via-switch |
| 表題 (title) |
SAT Encoding-Based Verification of Sneak Path Problem in Via-Switch FPGA |
| 表題 (英文) |
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| 著者名 (author) |
R. Doi,M. Hashimoto |
| 英文著者名 (author) |
R. Doi,M. Hashimoto |
| キー (key) |
R. Doi,M. Hashimoto |
| 定期刊行物名 (journal) |
Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI) |
| 定期刊行物名 (英文) |
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| 巻数 (volume) |
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| 号数 (number) |
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| ページ範囲 (pages) |
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| 刊行月 (month) |
7 |
| 出版年 (year) |
2018 |
| Impact Factor (JCR) |
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| URL |
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| 付加情報 (note) |
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| 注釈 (annote) |
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| 内容梗概 (abstract) |
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| 論文電子ファイル | pdf (application/pdf) [一般閲覧可] |
| BiBTeXエントリ |
@article{id478,
title = {{SAT} Encoding-based Verification of Sneak Path Problem in Via-switch {FPGA}},
author = {R. Doi and M. Hashimoto},
journal = {Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI)},
month = {7},
year = {2018},
}
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