Academic Journal
|
|
Via-Switch FPGA with Transistor-Free Programmability Enabling Energy-Efficient Near-Memory Parallel Computation
|
Japanese Journal of Applied Physics
| 61(SM0804)
|
|
October 2022
|
| pdf
|
Academic Journal
|
, N. Banno, M. Miyamura, , K. Okamoto, , N. Iguchi, M. Hashimoto, T. Sugibayashi, T. Sakamoto, M. Tada
|
Via-Switch FPGA: 65nm CMOS Implementation and Evaluation
|
IEEE Journal of Solid-State Circuits
| 57(7)
|
2250-2262
|
July 2022
|
| pdf
|
Academic Journal
|
R. Doi, , T. Sakamoto, M. Hashimoto
|
A Fault Detection and Diagnosis Method for Via-Switch Crossbar in Non-Volatile FPGA
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| 103-A(12)
|
1447--1455
|
December 2020
|
| pdf
|
Academic Journal
|
R. Doi, J. Yu, M. Hashimoto
|
Sneak Path Free Reconfiguration with Minimized Programming Steps for Via-Switch Crossbar Based FPGA
|
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| 39(10)
|
2572--2587
|
October 2020
|
| pdf
|
Academic Journal
|
N. Banno, K. Okamoto, N. Iguchi, H. Ochi, H. Onodera, M. Hashimoto, T. Sugibayashi, T. Sakamoto, M. Tada
|
Low-Power Crossbar Switch with Two-Varistors Selected Complementary Atom Switch (2V-1CAS; Via-Switch) for Nonvolatile FPGA
|
IEEE Transactions on Electron Devices
| 66(8)
|
3331--3336
|
August 2019
|
| pdf
|
Academic Journal
|
H. Ochi, K. Yamaguchi, T. Fujimoto, J. Hotate, T. Kishimoto, T. Higashi, T. Imagawa, R. Doi, M. Tada, T. Sugibayashi, W. Takahashi, K. Wakabayashi, H. Onodera, Y. Mitsuyama, J. Yu, M. Hashimoto
|
Via-Switch FPGA: Highly-Dense Mixed-Grained Reconfigurable Architecture with Overlay Via-Switch Crossbars
|
IEEE Transactions on VLSI Systems
| 26(12)
|
2723--2736
|
December 2018
|
| pdf
|
International Conference
|
T. Imagawa, J. Yu, M. Hashimoto, H. Ochi
|
MUX Granularity-Oriented Iterative Technology Mapping for Implementing Compute-Intensive Applications on Via-Switch FPGA
|
Proceedings of Design, Automation and Test in Europe Conference (DATE)
|
|
|
February 2021
|
| pdf
|
International Conference
|
, N. Banno, M. Miyamura, , K. Okamoto, , N. Iguchi, M. Hashimoto, T. Sugibayashi, T. Sakamoto, M. Tada
|
1.5x Energy-Efficient and 1.4x Operation-Speed Via-Switch FPGA with Rapid and Low-Cost ASIC Migration by Via-Switch Copy
|
Technical Digest of VLSI Symposium on Technology
|
|
|
June 2020
|
| pdf
|
International Conference
|
R. Doi, , T. Sakamoto, M. Hashimoto
|
Fault Diagnosis of Via-Switch Crossbar in Non-Volatile FPGA
|
Proceedings of Design, Automation and Test in Europe Conference (DATE)
|
|
|
April 2020
|
| pdf
|
International Conference
|
M. Hashimoto, , N. Banno, M. Tada, T. Sakamoto, J. Yu, R. Doi, , H. Onodera, T. Imagawa, H. Ochi, K. Wakabayashi, Y. Mitsuyama, T. Sugibayashi
|
Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for AI Applications
|
Technical Digest of International Solid-State Circuits Conference (ISSCC)
|
|
502--503
|
February 2020
|
| pdf
|
International Conference
|
|
Sneak Path Free Reconfiguration of Via-Switch Crossbars Based FPGA
|
Proceedings of ACM/IEEE International Conference on Computer-Aided Design (ICCAD)
|
|
|
November 2018
|
| pdf
|
International Conference
|
R. Doi, M. Hashimoto
|
SAT Encoding-Based Verification of Sneak Path Problem in Via-Switch FPGA
|
Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
|
|
|
July 2018
|
| pdf
|
International Conference
|
J. Hotate, T. Kishimoto, T. Higashi, H. Ochi, R. Doi, M. Tada, T. Sugibayashi, K. Wakabayashi, H. Onodera, Y. Mitsuyama, M. Hashimoto
|
A Highly-Dense Mixed Grained Reconfigurable Architecture with Overlay Crossbar Interconnect Using Via-Switch
|
Proceedings of International Conference on Field Programmable Logic and Applications (FPL)
|
|
|
August 2016
|
| pdf
|
Domestic Conference
|
, R. Doi, M. Hashimoto
|
Rc Extraction-Free Wiring Delay Analysis Focusing on Number of On-State Switches for Via-Switch Fpga
|
情報処理学会DAシンポジウム
|
|
|
August 2019
|
|
|
