Table of works
Frequent tags in this search: ai:3 architecture:2 soc:2 65-nm:1 accurately:1 applications:1 be:1 black-box/white-box:1 can:1 case:1 cases?:1 cmos:1 cnn-based:1 design:1 edge:1 error:1 estimated:1 exploration:1 extension:1 first:1 fpga:1 how:1 impact:1 implementation:1 method:1 platform:1 soft:1 space:1 study:1 via-switch:1
3 publications are found. : URL for this page. : HTML
| Author (author) | Title (title) | Journal/Conference | Volume / Number | Pages (pages) | Published date | Impact factor / Acceptance | File | |
|---|---|---|---|---|---|---|---|---|
| International Conference |
, , , W. Liao, , , M. Hashimoto |
How Accurately Can Soft Error Impact Be Estimated in Black-Box/White-Box Cases? -- a Case Study with an Edge AI SoC -- |
Proceedings of Design Automation Conference (DAC) | June 2024 |
pdf | |||
| International Conference |
M. Hashimoto, , N. Banno, M. Tada, T. Sakamoto, J. Yu, R. Doi, , H. Onodera, T. Imagawa, H. Ochi, K. Wakabayashi, Y. Mitsuyama, T. Sugibayashi |
Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for AI Applications |
Technical Digest of International Solid-State Circuits Conference (ISSCC) | 502--503 |
February 2020 |
pdf | ||
| International Conference |
, J. Yu, M. Hashimoto |
A Design Space Exploration Method of SoC Architecture for CNN-based AI Platform |
Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI) | October 2019 |