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R. Doi, J. Yu, and M. Hashimoto, "Sneak Path Free Reconfiguration with Minimized Programming Steps for Via-Switch Crossbar Based FPGA," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 39(10), pp. 2572--2587, October 2020.
ID 533
分類 論文誌
タグ crossbar fpga free minimized path programming reconfiguration sneak steps via-switch
表題 (title) Sneak Path Free Reconfiguration with Minimized Programming Steps for Via-Switch Crossbar Based FPGA
表題 (英文)
著者名 (author) R. Doi,J. Yu,M. Hashimoto
英文著者名 (author) R. Doi,J. Yu,M. Hashimoto
キー (key) R. Doi,J. Yu,M. Hashimoto
定期刊行物名 (journal) IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
定期刊行物名 (英文)
巻数 (volume) 39
号数 (number) 10
ページ範囲 (pages) 2572--2587
刊行月 (month) 10
出版年 (year) 2020
Impact Factor (JCR)
URL
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル pdf (application/pdf) [一般閲覧可]
BiBTeXエントリ
@article{id533,
         title = {Sneak Path Free Reconfiguration with Minimized Programming Steps for Via-switch Crossbar Based {FPGA}},
        author = {R. Doi and J. Yu and M. Hashimoto},
       journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
        volume = {39},
        number = {10},
         pages = {2572--2587},
         month = {10},
          year = {2020},
}