: Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, and T. Onoye, Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop with On-Chip Delay Measurement, October 2007.
Detail of a work
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| Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, and T. Onoye, "Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop with On-Chip Delay Measurement," IEEE Transactions on Circuits and Systems II, 54(10), pp. 868--872, October 2007. | |
| ID | 180 |
| 分類 | 論文誌 |
| タグ | average delay dependence drop full-chip measurement model noise on-chip simulation supply validation voltage |
| 表題 (title) |
Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop with On-Chip Delay Measurement |
| 表題 (英文) |
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| 著者名 (author) |
Y. Ogasahara,T. Enami,M. Hashimoto,T. Sato,T. Onoye |
| 英文著者名 (author) |
Y. Ogasahara,T. Enami,M. Hashimoto,T. Sato,T. Onoye |
| キー (key) |
Y. Ogasahara,T. Enami,M. Hashimoto,T. Sato,T. Onoye |
| 定期刊行物名 (journal) |
IEEE Transactions on Circuits and Systems II |
| 定期刊行物名 (英文) |
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| 巻数 (volume) |
54 |
| 号数 (number) |
10 |
| ページ範囲 (pages) |
868--872 |
| 刊行月 (month) |
10 |
| 出版年 (year) |
2007 |
| Impact Factor (JCR) |
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| URL |
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| 付加情報 (note) |
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| 注釈 (annote) |
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| 内容梗概 (abstract) |
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| 論文電子ファイル | 94.pdf (application/pdf) [一般閲覧可] |
| BiBTeXエントリ |
@article{id180,
title = {Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop with On-chip Delay Measurement},
author = {Y. Ogasahara and T. Enami and M. Hashimoto and T. Sato and T. Onoye},
journal = {IEEE Transactions on Circuits and Systems II},
volume = {54},
number = {10},
pages = {868--872},
month = {10},
year = {2007},
}
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