論文誌
|
Y. Masuda, T. Onoye, M. Hashimoto
|
Performance Evaluation of Software-Based Error Detection Mechanisms for Supply Noise Induced Timing Errors
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E100-A(7)
|
1452--1463
|
2017年7月
|
| pdf
|
論文誌
|
T. Okumura, F. Minami, K. Shimazaki, K. Kuwada, M. Hashimoto
|
Gate Delay Estimation in STA under Dynamic Power Supply Noise
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E93-A(12)
|
2447--2455
|
2010年12月
|
| 151.pdf
|
論文誌
|
T. Enami, K. Shinkai, S. Ninomiya, S. Abe, M. Hashimoto
|
Statistical Timing Analysis Considering Clock Jitter and Skew Due to Power Supply Noise and Process Variation
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E93-A(12)
|
2399--2408
|
2010年12月
|
| 148.pdf
|
論文誌
|
T. Enami, S. Ninomiya, M. Hashimoto
|
Statistical Timing Analysis Considering Spatially and Temporally Correlated Dynamic Power Supply Noise
|
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| 28(4)
|
541 - 553
|
2009年4月
|
| 118.pdf
|
論文誌
|
Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, T. Onoye
|
Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop with On-Chip Delay Measurement
|
IEEE Transactions on Circuits and Systems II
| 54(10)
|
868--872
|
2007年10月
|
| 94.pdf
|
論文誌
|
T. Kanamoto, S. Akutsu, T. Nakabayashi, T. Ichinomiya, K. Hachiya, A. Kurokawa, H. Ishikawa, S. Muromoto, H. Kobayashi, M. Hashimoto
|
Impact of Intrinsic Parasitic Extraction Errors on Timing and Noise Estimation
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E89-A(12)
|
3666-3670
|
2006年12月
|
| 5.pdf
|
論文誌
|
M. Hashimoto, M. Takahashi, H. Onodera
|
Crosstalk Noise Estimation for Generic RC Trees
|
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
| E86-A(12)
|
2965-2973
|
2003年12月
|
| 13.pdf
|
国際会議
|
Cai Biesinger, Hiromitsu Awano, Masanori Hashimoto
|
Window Function-Less DFT with Reduced Noise and Latency for Real-Time Music Analysis
|
Proceedings of European Signal Processing Conference (EUSIPCO)
|
|
|
2025年9月
|
|
|
国際会議
|
M. Hashimoto, J. Chen
|
Proactive Supply Noise Mitigation and Design Methodology for Robust VLSI Power Distribution (Invited)
|
Proceedings of China Semiconductor Technology International Conference (CSTIC)
|
|
|
2021年3月
|
| pdf
|
国際会議
|
J. Chen, M. Hashimoto
|
Proactive Supply Noise Mitigation with Low-Latency Minor Voltage Regulator and Lightweight Current Prediction
|
Proceedings of International Test Conference (ITC)
|
|
|
2020年11月
|
| pdf
|
国際会議
|
Y. Takai, Y. Ogasahara, M. Hashimoto, T. Onoye
|
Measurement of On-Chip I/O Power Supply Noise and Correlation Verification between Noise Magnitude and Delay Increase Due to SSO
|
Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI)
|
|
19--20
|
2010年5月
|
| 139.pdf
|
国際会議
|
T. Okumura, F. Minami, K. Shimazaki, K. Kuwada, M. Hashimoto
|
Gate Delay Estimation in STA under Dynamic Power Supply Noise
|
Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
|
|
775 -- 780
|
2010年1月
|
| 132.pdf
|
国際会議
|
Y. Ogasahara, M. Hashimoto, T. Onoye
|
Dynamic Supply Noise Measurement Circuit Composed of Standard Cells Suitable for In-Site SoC Power Integrity Verification
|
Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
|
|
107--108
|
2008年1月
|
| 97.pdf
|
国際会議
|
M. Takahashi, M. Hashimoto, H. Onodera
|
Crosstalk Noise Estimation for Generic RC Trees
|
Proceedings of International Conference on Computer Design (ICCD)
|
|
110-116
|
2001年9月
|
| 58.pdf
|
