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論文誌

[1] Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, and T. Onoye, "Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop with On-Chip Delay Measurement," IEEE Transactions on Circuits and Systems II, volume 54, number 10, pages 868--872, October 2007. [94.pdf]

国際会議

[1] J. Chen and M. Hashimoto, "A Frequency-Dependent Target Impedance Method Fulfilling both Average and Dynamic Voltage Drop Constraints," Proceedings of IEEE Workshop on Signal and Power Integrity (SPI), June 2019. [pdf]