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論文誌
[1] T. Mahara, S. Manabe, Y. Watanabe, W. Liao, M. Hashimoto, T. Y. Saito, M. Niikura, K. Ninomiya, D. Tomono, and A. Sato, "Irradiation Test of 65 nm Bulk SRAMs with DC Muon Beam at RCNP MuSIC Facility," IEEE Transactions on Nuclear Science, volume 67, number 7, 1555 -- 1559, July 2020. [pdf]
[2] S. Ninomiya and M. Hashimoto, "Accuracy Enhancement of Grid-Based SSTA by Coefficient Interpolation," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E93-A, number 12, pages 2441--2446, December 2010. [150.pdf]
[3] T. Enami, K. Shinkai, S. Ninomiya, S. Abe, and M. Hashimoto, "Statistical Timing Analysis Considering Clock Jitter and Skew Due to Power Supply Noise and Process Variation," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E93-A, number 12, pages 2399--2408, December 2010. [148.pdf]
[4] T. Enami, S. Ninomiya, and M. Hashimoto, "Statistical Timing Analysis Considering Spatially and Temporally Correlated Dynamic Power Supply Noise," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, volume 28, number 4, 541 - 553, April 2009. [118.pdf]
国際会議
[1] T. Mahara, S. Manabe, Y. Watanabe, W. Liao, M. Hashimoto, T. Y. Saito, M. Niikura, K. Ninomiya, D. Tomono, and A. Sato, "Irradiation Test of 65-nm Bulk SRAMs with DC Muon Beam at RCNP-MuSIC Facility," Proceedings of European Conference on Radiation and Its Effects on Components and Systems (RADECS), September 2019.
[2] T. Enami, K. Shinkai, S. Ninomiya, S. Abe, and M. Hashimoto, "Statistical Timing Analysis Considering Clock Jitter and Skew Due to Power Supply Noise and Process Variation," ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 41--46, March 2010.
[3] S. Ninomiya and M. Hashimoto, "Enhancement of Grid-Based Spatially-Correlated Variability Modeling for Improving SSTA Accuracy," Proceedings of IEEE International SOC Conference (SOCC), pages 337--340, September 2009. [141.pdf]
[4] T. Enami, S. Ninomiya, and M. Hashimoto, "Statistical Timing Analysis Considering Spatially and Temporally Correlated Dynamic Power Supply Noise," Proceedings of ACM International Symposium on Physical Design (ISPD), pages 160-167, April 2008. [107.pdf]
研究会・全国大会等
[1] 小笠原泰弘, 新開健一, 榎並孝司, 阿部慎也, 二宮進有, 橋本昌宜, "ナノメートル世代のVLSIタイミング設計技術の研究," 第10回システムLSIワークショップ, pages 195-198, 2006年11月.