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論文誌

[1] Y. Takai, M. Hashimoto, and T. Onoye, "Power Gating Implementation for Supply Noise Mitigation with Body-Tied Triple-Well Structure," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E95-A, number 12, pages 2220--2225, December 2012. [172.pdf]

国際会議

[1] Y. Takai, M. Hashimoto, and T. Onoye, "Power Gating Implementation for Noise Mitigation with Body-Tied Triple-Well Structure," Proceedings of IEEE Custom Integrated Circuits Conference (CICC), September 2011. [163.pdf]

[2] Y. Takai, M. Hashimoto, and T. Onoye, "Evaluation of Power Gating Structures Focusing on Power Supply Noise with Measurement and Simulation," Proceedings of IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), pages 213--216, October 2010. [146.pdf]

[3] Y. Takai, Y. Ogasahara, M. Hashimoto, and T. Onoye, "Measurement of On-Chip I/O Power Supply Noise and Correlation Verification between Noise Magnitude and Delay Increase Due to SSO," Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI), pages 19--20, May 2010. [139.pdf]