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論文誌

[1] S. Kimura, M. Hashimoto, and T. Onoye, "A Body Bias Clustering Method for Low Test-Cost Post-Silicon Tuning," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E95-A, number 12, pages 2292--2300, December 2012. [173.pdf]

国際会議

[1] S. Kimura, M. Hashimoto, and T. Onoye, "Body Bias Clustering for Low Test-Cost Post-Silicon Tuning," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 283--289, February 2012. [167.pdf]

[2] S. Kimura, M. Hashimoto, and T. Onoye, "Body Bias Clustering for Low Test-Cost Post-Silicon Tuning," ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 46--51, April 2011.