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国際会議

[1] Q. Cheng, H. Zhang, Q. Li, Y. Liang, M. Zhang, Z. Chen, R. Zhang, J. Xiong, M. Huang, L. Lin, and M. Hashimoto, "A Scalable External Memory Access and On-Chip Storage Architecture for Edge-AI Accelerators -- Multi-Path Rolling Data Refresh and Layer-Wise Bank Allocation --," Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 採録済.

[2] R. Iwamoto and M. Hashimoto, "Avoiding Soft Error-Induced Illegal Memory Accesses in GPU with Inter-Thread Communication," Proceedings of International Symposium on On-Line Testing and Robust System Design (IOLTS), July 2023. [pdf]

[3] D. Liang, M. Hashimoto, and H. Awano, "BloomCA: a Memory Efficient Reservoir Computing Hardware Implementation Using Cellular Automata and Ensemble Bloom Filter," Proceedings of Design, Automation and Test in Europe Conference (DATE), February 2021. [pdf]

[4] K. Onishi, J. Yu, and M. Hashimoto, "Memory Efficient Training Using Lookup-Table-Based Quantization for Neural Network," Proceedings of International Conference on Artificial Intelligence Circuits and Systems (AICAS), August 2020. [pdf]