この検索内の頻出タグ: allocation^:2 accelerators^:1 access^:1 aligned^:1 analytical^:1 architecture^:1 bank^:1 carlo-based^:1 cross^:1 data^:1 edge-ai^:1 external^:1 layer-wise^:1 memory^:1 model^:1 monte^:1 multi-path^:1 on-chip^:1 physics-based^:1 proton-induced^:1 refresh^:1 rolling^:1 scalable^:1 section^:1 sensitive^:1 seu^:1 simulation^:1 storage^:1 volume^:1

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国際会議

[1] Q. Cheng, H. Zhang, Q. Li, Y. Liang, M. Zhang, Z. Chen, R. Zhang, J. Xiong, M. Huang, L. Lin, and M. Hashimoto, "A Scalable External Memory Access and On-Chip Storage Architecture for Edge-AI Accelerators -- Multi-Path Rolling Data Refresh and Layer-Wise Bank Allocation --," Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 採録済.

[2] K. Takeuchi and M. Hashimoto, "Sensitive Volume Allocation Aligned with a Physics-Based Analytical Cross Section Model for Monte Carlo-Based Proton-Induced SEU Simulation," Proceedings of European Conference on Radiation and Its Effects on Components and Systems (RADECS), 採録済.