Detail of a work
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Q. Cheng, H. Zhang, Q. Li, Y. Liang, M. Zhang, Z. Chen, R. Zhang, J. Xiong, M. Huang, L. Lin, and M. Hashimoto, "A Scalable External Memory Access and On-Chip Storage Architecture for Edge-AI Accelerators -- Multi-Path Rolling Data Refresh and Layer-Wise Bank Allocation --," Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 採録済. | |
ID | 663 |
分類 | 国際会議 |
タグ | accelerators access allocation architecture bank data edge-ai external layer-wise memory multi-path on-chip refresh rolling scalable storage |
表題 (title) |
A Scalable External Memory Access and On-Chip Storage Architecture for Edge-AI Accelerators -- Multi-Path Rolling Data Refresh and Layer-Wise Bank Allocation -- |
表題 (英文) |
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著者名 (author) |
Q. Cheng,H. Zhang,Q. Li,Y. Liang,M. Zhang,Z. Chen,R. Zhang,J. Xiong,M. Huang,L. Lin,M. Hashimoto |
英文著者名 (author) |
,,,,,,,,,,M. Hashimoto |
キー (key) |
,,,,,,,,,,M. Hashimoto |
定期刊行物名 (journal) |
Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) |
定期刊行物名 (英文) |
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巻数 (volume) |
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号数 (number) |
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ページ範囲 (pages) |
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刊行月 (month) |
0 |
出版年 (year) |
(to appear) |
Impact Factor (JCR) |
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URL |
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付加情報 (note) |
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注釈 (annote) |
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内容梗概 (abstract) |
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論文電子ファイル | 利用できません. |
BiBTeXエントリ |
@article{id663, title = {A Scalable External Memory Access and On-Chip Storage Architecture for {Edge-AI} Accelerators -- Multi-Path Rolling Data Refresh and Layer-Wise Bank Allocation --}, author = {Q. Cheng and H. Zhang and Q. Li and Y. Liang and M. Zhang and Z. Chen and R. Zhang and J. Xiong and M. Huang and L. Lin and M. Hashimoto}, journal = {Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)}, month = {0}, year = {(to appear)}, } |