この検索内の頻出タグ: toward^:5 modeling^:4 3d^:2 design^:2 extraction^:2 inductance^:2 interconnect^:2 position^:2 resistance^:2 si-substrate^:2 soc^:2 substrate-aware^:2 capsule^:1 coil^:1 containing^:1 cubic-millimeters^:1 daily^:1 diagnosis^:1 endoscopy^:1 estimation^:1 highly^:1 instant^:1 invited^:1 life^:1 method^:1 nodes^:1 numerous^:1 object^:1 parallelizable^:1 posture^:1

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論文誌

[1] T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, "Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in SoC Design," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3560-3568, December 2006. [3.pdf]

国際会議

[1] M. Harimaya, R. Shirai, and M. Hashimoto, "Toward Instant 3D Modeling: Highly Parallelizable Shape Reproduction Method for Soft Object Containing Numerous Tiny Position Trackers," Proceedings of International Conference on Intelligent User Interfaces (IUI), March 2023. [pdf]

[2] R. Shimizu, R. Shirai, and M. Hashimoto, "Position and Posture Estimation of Capsule Endoscopy with a Single Wearable Coil Toward Daily Life Diagnosis," Proceedings of International Midwest Symposium on Circuits and Systems (MWSCAS), pages 57--60, August 2020. [pdf]

[3] M. Hashimoto, R. Shirai, Y. Itoh, and T. Hirose, "Toward Real-Time 3D Modeling System with Cubic-Millimeters Wireless Sensor Nodes (Invited)," Proceedings of IEEE International Conference on ASIC, pages 1087--1091, October 2017. [pdf]

[4] T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, "Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in SoC Design," In Proceedings of IEEE Wrokshop on Signal Propagation on Interconnects (SPI), pages 227-230, May 2006. [65.pdf]