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論文誌

[1] B. Li, M. Hashimoto, and U. Schlichtmann, "From Process Variations to Reliability: a Survey of Timing of Digital Circuits in the Nanometer Era (Invited)," IPSJ Transactions on System LSI Design Methodology, volume 11, pages 2--15, February 2018.

[2] Z. Huang, A. Kurokawa, M. Hashimoto, T. Sato, M. Jiang, and Y. Inoue, "Modeling the Overshooting Effect for CMOS Inverter Delay Analysis in Nanometer Technologies," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, volume 29, number 2, pages 250--260, February 2010. [134.pdf]