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論文誌

[1] T. Miyazaki, M. Hashimoto, and H. Onodera, "A Performance Prediction of Clock Generation PLLs: a Ring Oscillator Based PLL and an LC Oscillator Based PLL," IEICE Trans. on Electronics, volume E88-C, number 3, pages 437-444, March 2005. [89.pdf]

国際会議

[1] J. Chen and M. Hashimoto, "Proactive Supply Noise Mitigation with Low-Latency Minor Voltage Regulator and Lightweight Current Prediction," Proceedings of International Test Conference (ITC), November 2020. [pdf]

[2] Y. Masuda and M. Hashimoto, "MTTF-aware Design Methodology of Error Prediction Based Adaptively Voltage-Scaled Circuits," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), January 2018. [pdf]

[3] M. Hashimoto, A. Tsuchiya, A. Shinmyo, and H. Onodera, "Performance Prediction of On-Chip Global Signaling," In IEEE Electrical Design of Advanced Packaging and Systems (EDAPS), pages 87-100, November 2004.

[4] T. Miyazaki, M. Hashimoto, and H. Onodera, "A Performance Prediction of Clock Generation PLLs: a Ring Oscillator Based PLL and an LC Oscillator Based PLL," In IEEJ International Analog VLSI Workshop, pages 45-50, October 2004.