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Y. Masuda and M. Hashimoto, "MTTF-aware Design Methodology of Error Prediction Based Adaptively Voltage-Scaled Circuits," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), January 2018. | |
ID | 461 |
分類 | 国際会議 |
タグ | adaptively circuits design error methodology mttf-aware prediction voltage-scaled |
表題 (title) |
MTTF-aware Design Methodology of Error Prediction Based Adaptively Voltage-Scaled Circuits |
表題 (英文) |
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著者名 (author) |
Y. Masuda,M. Hashimoto |
英文著者名 (author) |
Y. Masuda,M. Hashimoto |
キー (key) |
Y. Masuda,M. Hashimoto |
定期刊行物名 (journal) |
Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC) |
定期刊行物名 (英文) |
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巻数 (volume) |
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号数 (number) |
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ページ範囲 (pages) |
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刊行月 (month) |
1 |
出版年 (year) |
2018 |
Impact Factor (JCR) |
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URL |
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付加情報 (note) |
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注釈 (annote) |
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内容梗概 (abstract) |
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論文電子ファイル | pdf (application/pdf) [一般閲覧可] |
BiBTeXエントリ |
@article{id461, title = {{MTTF-aware} Design Methodology of Error Prediction Based Adaptively Voltage-scaled Circuits}, author = {Y. Masuda and M. Hashimoto}, journal = {Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)}, month = {1}, year = {2018}, } |