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Y. Masuda and M. Hashimoto, "MTTF-aware Design Methodology of Error Prediction Based Adaptively Voltage-Scaled Circuits," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), January 2018.
ID 461
分類 国際会議
タグ adaptively circuits design error methodology mttf-aware prediction voltage-scaled
表題 (title) MTTF-aware Design Methodology of Error Prediction Based Adaptively Voltage-Scaled Circuits
表題 (英文)
著者名 (author) Y. Masuda,M. Hashimoto
英文著者名 (author) Y. Masuda,M. Hashimoto
キー (key) Y. Masuda,M. Hashimoto
定期刊行物名 (journal) Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
定期刊行物名 (英文)
巻数 (volume)
号数 (number)
ページ範囲 (pages)
刊行月 (month) 1
出版年 (year) 2018
Impact Factor (JCR)
URL
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル pdf (application/pdf) [一般閲覧可]
BiBTeXエントリ
@article{id461,
         title = {{MTTF-aware} Design Methodology of Error Prediction Based Adaptively Voltage-scaled Circuits},
        author = {Y. Masuda and M. Hashimoto},
       journal = {Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)},
         month = {1},
          year = {2018},
}