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国際会議
[1] Cai Biesinger, Hiromitsu Awano, and Masanori Hashimoto, "Window Function-Less DFT with Reduced Noise and Latency for Real-Time Music Analysis," Proceedings of European Signal Processing Conference (EUSIPCO), 採録済.
[2] J. Chen, T. Kanamoto, H. Kando, and M. Hashimoto, "An On-Chip Load Model for Off-Chip PDN Analysis Considering Interdependency between Supply Voltage, Current Profile and Clock Latency," Proceedings of IEEE Workshop on Signal and Power Integrity (SPI), May 2018. [pdf]