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この検索内の頻出タグ: analysis:1 clock:1 considering:1 current:1 interdependency:1 latency:1 load:1 model:1 off-chip:1 on-chip:1 pdn:1 profile:1 supply:1 voltage:1

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国際会議
[1] J. Chen, T. Kanamoto, H. Kando, and M. Hashimoto, "An On-Chip Load Model for Off-Chip PDN Analysis Considering Interdependency between Supply Voltage, Current Profile and Clock Latency," Proceedings of IEEE Workshop on Signal and Power Integrity (SPI), May 2018. [pdf]