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論文誌

[1] Y. Masuda, T. Onoye, and M. Hashimoto, "Performance Evaluation of Software-Based Error Detection Mechanisms for Supply Noise Induced Timing Errors," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E100-A, number 7, pages 1452--1463, July 2017. [pdf]

国際会議

[1] Tadashi Matsunaga, Kensaku Sugai, Masaru Yano, and Masanori Hashimoto, "Analysis of TID-Induced Error Mechanisms in 58-nm NOR Flash Memory," Proceedings of European Conference on Radiation and Its Effects on Components and Systems (RADECS), 採録済.