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この検索内の頻出タグ: circuit/instance/transistor-level:1 comparative:1 consideration:1 degrading:1 delay:1 due:1 estimation:1 nbti:1 probability:1 stress:1 study:1

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国際会議
[1] H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Comparative Study on Delay Degrading Estimation Due to NBTI with Circuit/Instance/Transistor-Level Stress Probability Consideration," Proceedings of International Symposium on Quality Electronic Design (ISQED), pages 646--651, March 2010. [137.pdf]