この検索内の頻出タグ: mapping^:2 13-34^:1 accelerator^:1 applications^:1 booth-value-confined^:1 compute-intensive^:1 computing^:1 contiguity-aware^:1 edge-ai^:1 featuring^:1 fpga^:1 granularity-oriented^:1 implementing^:1 iterative^:1 mux^:1 near-memory^:1 processor^:1 technology^:1 tops/w^:1 via-switch^:1

2 件の該当がありました． : このページのURL : HTML

国際会議

[1] Q Cheng, L. Lin, M. Huang, Q. Li, Z. Yang, L. Dai, H. Yu, Y-J. Chen, Y. Shi, and M. Hashimoto, "A 13-34 TOPS/W Edge-AI Processor Featuring Booth-Value-Confined Accelerator, Near-Memory Computing, and Contiguity-Aware Mapping," Technical Digest of Asian Solid-State Circuits Conference (A-SSCC), 採録済.

[2] T. Imagawa, J. Yu, M. Hashimoto, and H. Ochi, "MUX Granularity-Oriented Iterative Technology Mapping for Implementing Compute-Intensive Applications on Via-Switch FPGA," Proceedings of Design, Automation and Test in Europe Conference (DATE), February 2021. [pdf]