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この検索内の頻出タグ: analysis:1 chip:1 considering:1 interdependency:1 load:1 mode:1 model:1 multi-core:1 operation:1 pdn:1 transitions:1 voltage-current-timing:1

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論文誌
[1] J. Chen, H. Kando, T. Kanamoto, C. Zhuo, and M. Hashimoto, "A Multi-Core Chip Load Model for PDN Analysis Considering Voltage-Current-Timing Interdependency and Operation Mode Transitions," IEEE Transactions on Components, Packaging and Manufacturing Technology, volume 9, number 9, pages 1669--1679, September 2019. [pdf]