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J. Chen, H. Kando, T. Kanamoto, C. Zhuo, and M. Hashimoto, "A Multi-Core Chip Load Model for PDN Analysis Considering Voltage-Current-Timing Interdependency and Operation Mode Transitions," IEEE Transactions on Components, Packaging and Manufacturing Technology, 9(9), pp. 1669--1679, September 2019.
ID 514
分類 論文誌
タグ analysis chip considering interdependency load mode model multi-core operation pdn transitions voltage-current-timing
表題 (title) A Multi-Core Chip Load Model for PDN Analysis Considering Voltage-Current-Timing Interdependency and Operation Mode Transitions
表題 (英文)
著者名 (author) J. Chen,H. Kando,T. Kanamoto,C. Zhuo,M. Hashimoto
英文著者名 (author) J. Chen,H. Kando,T. Kanamoto,,M. Hashimoto
キー (key) J. Chen,H. Kando,T. Kanamoto,,M. Hashimoto
定期刊行物名 (journal) IEEE Transactions on Components, Packaging and Manufacturing Technology
定期刊行物名 (英文)
巻数 (volume) 9
号数 (number) 9
ページ範囲 (pages) 1669--1679
刊行月 (month) 9
出版年 (year) 2019
Impact Factor (JCR)
URL
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル pdf (application/pdf) [一般閲覧可]
BiBTeXエントリ
@article{id514,
         title = {A {Multi-Core} Chip Load Model for {PDN} Analysis Considering Voltage-Current-Timing Interdependency and Operation Mode Transitions},
        author = {J. Chen and H. Kando and T. Kanamoto and C. Zhuo and M. Hashimoto},
       journal = {IEEE Transactions on Components, Packaging and Manufacturing Technology},
        volume = {9},
        number = {9},
         pages = {1669--1679},
         month = {9},
          year = {2019},
}