この検索内の頻出タグ: 22nm^:2 8t^:1 area-efficient^:1 bitcell^:1 cmos^:1 compute-in-memory^:1 compute-sram^:1 computing^:1 design^:1 digital^:1 hyper-heterogeneous^:1 in-orbit^:1 low-power^:1 macros^:1 multi-modal^:1 resource-frugal^:1 system-on-chip^:1 towards^:1

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論文誌

[1] M. Lou, J. Wang, H. Li, Z. Yang, Q. Cheng, J. Li, M. Hashimoto, and L. Lin, "Area-Efficient and Low-Power 8T Compute-SRAM Bitcell Design for Digital Compute-In-Memory Macros in 22nm CMOS," IEEE Transactions on Circuits and Systems II, 採録済.

国際会議

[1] Q. Cheng, Qiufeng Li, W. Dong, M. Zhang, R. Zhang, M. Huang, H. Yu, Y. Shi, H. Awano, T. Sato, L. Lin, and M. Hashimoto, "A 22nm Resource-Frugal Hyper-Heterogeneous Multi-Modal System-On-Chip Towards In-Orbit Computing," Proceedings of IEEE Custom Integrated Circuits Conference (CICC), April 2025. [pdf]