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この検索内の頻出タグ: rram:2 analysis:1 approach:1 calibration:1 computing:1 crossbar:1 delay:1 drift-aware:1 fpga:1 in-memory:1 interconnect:1 invited:1 lightweight:1 reliability:1 vector-based:1 via:1

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国際会議
[1] Weirong Dong, Kai Zhou, Zhen Kong, Zhenke Yang, Quan Cheng, Haoyuan Li, Junkai Huang, Masanori Hashimoto, and Longyang Lin, "VeRA+: Vector-Based Lightweight Compensation for Drift-Resilient RRAM In-Memory Computing," Proceedings of Design Automation Conference (DAC), July 2026.
[2] M. Hashimoto, Y. Nakazawa, R. Doi, and J. Yu, "Interconnect Delay Analysis for RRAM Crossbar Based FPGA (Invited)," Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2018. [pdf]