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論文誌
[1] Tomonari Tanaka, Takumi Uezono, Kohei Suenaga, and Masanori Hashimoto, "In-Situ Hardware Error Detection Using Specification-Derived Petri Net Models and Behavior-Derived State Sequences," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 採録済.
国際会議
[1] T. Tanaka, T. Uezono, K. Suenaga, and M. Hashimoto, "Hardware Error Detection with In-Situ Monitoring of Control Flow-Related Specifications," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), 966 - 973, January 2025. [pdf]
[2] Y. Masuda, J. Nagayama, H. Takeno, Y. Ogawa, Y. Momiyama, and M. Hashimoto, "Comparing Voltage Adaptation Performance between Replica and In-Situ Timing Monitors," Proceedings of ACM/IEEE International Conference on Computer-Aided Design (ICCAD), November 2018. [pdf]