- 国際会議
- [1] D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "Soft Error Resilient VLSI Architecture for Signal Processing," Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pages 183--186, December 2009. [142.pdf]