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A. Shinmyo, M. Hashimoto, and H. Onodera, "Design and Optimization of CMOS Current Mode Logic Dividers," In IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, pp. 434-435, August 2004. | |
ID | 64 |
分類 | 国際会議 |
タグ | cmos current design dividers logic mode optimization |
表題 (title) |
Design and Optimization of CMOS Current Mode Logic Dividers |
表題 (英文) |
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著者名 (author) |
A. Shinmyo,M. Hashimoto,H. Onodera |
英文著者名 (author) |
A. Shinmyo,M. Hashimoto,H. Onodera |
編者名 (editor) |
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編者名 (英文) |
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キー (key) |
A. Shinmyo,M. Hashimoto,H. Onodera |
書籍・会議録表題 (booktitle) |
IEEE Asia-Pacific Conference on Advanced System Integrated Circuits |
書籍・会議録表題(英文) |
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巻数 (volume) |
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号数 (number) |
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ページ範囲 (pages) |
434-435 |
組織名 (organization) |
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出版元 (publisher) |
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出版元 (英文) |
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出版社住所 (address) |
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刊行月 (month) |
8 |
出版年 (year) |
2004 |
採択率 (acceptance) |
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URL |
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付加情報 (note) |
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注釈 (annote) |
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内容梗概 (abstract) |
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論文電子ファイル | 55.pdf (application/pdf) [一般閲覧可] |
BiBTeXエントリ |
@inproceedings{id64, title = {Design and Optimization of {CMOS} Current Mode Logic Dividers}, author = {A. Shinmyo and M. Hashimoto and H. Onodera}, booktitle = {IEEE Asia-Pacific Conference on Advanced System Integrated Circuits}, pages = {434-435}, month = {8}, year = {2004}, } |