: T. Nakayama and M. Hashimoto, Hold Violation Analysis for Functional Test of Ultra-Low Temperature Circuits at Room Temperature, April 2018.
Detail of a work
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| T. Nakayama and M. Hashimoto, "Hold Violation Analysis for Functional Test of Ultra-Low Temperature Circuits at Room Temperature," Proceedings of International Symposium on VLSI Design, Automation and Test (VLSI-DAT), April 2018. | |
| ID | 466 |
| 分類 | 国際会議 |
| タグ | analysis circuits functional hold room temperature test ultra-low violation |
| 表題 (title) |
Hold Violation Analysis for Functional Test of Ultra-Low Temperature Circuits at Room Temperature |
| 表題 (英文) |
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| 著者名 (author) |
T. Nakayama,M. Hashimoto |
| 英文著者名 (author) |
T. Nakayama,M. Hashimoto |
| キー (key) |
T. Nakayama,M. Hashimoto |
| 定期刊行物名 (journal) |
Proceedings of International Symposium on VLSI Design, Automation and Test (VLSI-DAT) |
| 定期刊行物名 (英文) |
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| 巻数 (volume) |
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| 号数 (number) |
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| ページ範囲 (pages) |
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| 刊行月 (month) |
4 |
| 出版年 (year) |
2018 |
| Impact Factor (JCR) |
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| URL |
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| 付加情報 (note) |
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| 注釈 (annote) |
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| 内容梗概 (abstract) |
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| 論文電子ファイル | pdf (application/pdf) [一般閲覧可] |
| BiBTeXエントリ |
@article{id466,
title = {Hold Violation Analysis for Functional Test of Ultra-Low Temperature Circuits at Room Temperature},
author = {T. Nakayama and M. Hashimoto},
journal = {Proceedings of International Symposium on VLSI Design, Automation and Test (VLSI-DAT)},
month = {4},
year = {2018},
}
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