: W. Liao, S. Hirokawa, R. Harada, and M. Hashimoto, Contributions of SRAM, FF and Combinational Circuit to Chip-Level Neutron-Induced Soft Error Rate -- Bulk vs. FD-SOI at 0.5 and 1.0V --, June 2017.
Detail of a work
| Tweet | |
| W. Liao, S. Hirokawa, R. Harada, and M. Hashimoto, "Contributions of SRAM, FF and Combinational Circuit to Chip-Level Neutron-Induced Soft Error Rate -- Bulk vs. FD-SOI at 0.5 and 1.0V --," Proceedings of International NEWCAS Conference, pp. 33-37, June 2017. | |
| ID | 452 |
| 分類 | 国際会議 |
| タグ | 0.5 1.0v bulk chip-level circuit combinational contributions error fd-soi ff neutron-induced rate soft sram vs. |
| 表題 (title) |
Contributions of SRAM, FF and Combinational Circuit to Chip-Level Neutron-Induced Soft Error Rate -- Bulk vs. FD-SOI at 0.5 and 1.0V -- |
| 表題 (英文) |
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| 著者名 (author) |
W. Liao,S. Hirokawa,R. Harada,M. Hashimoto |
| 英文著者名 (author) |
W. Liao,S. Hirokawa,R. Harada,M. Hashimoto |
| キー (key) |
W. Liao,S. Hirokawa,R. Harada,M. Hashimoto |
| 定期刊行物名 (journal) |
Proceedings of International NEWCAS Conference |
| 定期刊行物名 (英文) |
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| 巻数 (volume) |
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| 号数 (number) |
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| ページ範囲 (pages) |
33-37 |
| 刊行月 (month) |
6 |
| 出版年 (year) |
2017 |
| Impact Factor (JCR) |
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| URL |
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| 付加情報 (note) |
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| 注釈 (annote) |
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| 内容梗概 (abstract) |
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| 論文電子ファイル | pdf (application/pdf) [一般閲覧可] |
| BiBTeXエントリ |
@article{id452,
title = {Contributions of {SRAM}, {FF} and Combinational Circuit to Chip-Level Neutron-Induced Soft Error Rate -- Bulk {vs.} {FD-SOI} at 0.5 and {1.0V} --},
author = {W. Liao and S. Hirokawa and R. Harada and M. Hashimoto},
journal = {Proceedings of International NEWCAS Conference},
pages = {33-37},
month = {6},
year = {2017},
}
|