: M. Hashimoto, H. Onodera, and K. Tamaru, Practical Gate Resizing Technique Considering Glitch Reduction for Low Power Design, June 1999.
Detail of a work
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| M. Hashimoto, H. Onodera, and K. Tamaru, "Practical Gate Resizing Technique Considering Glitch Reduction for Low Power Design," In Proceedings of the 36th IEEE/ACM Design Automation Conference (DAC), pp. 446-451, June 1999. | |
| ID | 86 |
| 分類 | 国際会議 |
| タグ | |
| 表題 (title) |
Practical Gate Resizing Technique Considering Glitch Reduction for Low Power Design |
| 表題 (英文) |
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| 著者名 (author) |
M. Hashimoto,H. Onodera,K. Tamaru |
| 英文著者名 (author) |
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| 編者名 (editor) |
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| 編者名 (英文) |
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| キー (key) |
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| 書籍・会議録表題 (booktitle) |
Proceedings of the 36th IEEE/ACM Design Automation Conference (DAC) |
| 書籍・会議録表題(英文) |
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| 巻数 (volume) |
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| 号数 (number) |
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| ページ範囲 (pages) |
446-451 |
| 組織名 (organization) |
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| 出版元 (publisher) |
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| 出版元 (英文) |
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| 出版社住所 (address) |
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| 刊行月 (month) |
6 |
| 出版年 (year) |
1999 |
| 採択率 (acceptance) |
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| URL |
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| 付加情報 (note) |
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| 注釈 (annote) |
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| 内容梗概 (abstract) |
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| 論文電子ファイル | 47.pdf (application/pdf) [一般閲覧可] |
| BiBTeXエントリ |
@inproceedings{id86,
title = {Practical Gate Resizing Technique Considering Glitch Reduction for Low Power Design},
author = {M. Hashimoto and H. Onodera and K. Tamaru},
booktitle = {Proceedings of the 36th IEEE/ACM Design Automation Conference (DAC)},
pages = {446-451},
month = {6},
year = {1999},
}
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