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M. Hashimoto and H. Onodera, "A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis," In Proceedings of the Ninth Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pp. 115-121, April 2000.
ID 85
分類 国際会議
タグ
表題 (title) A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis
表題 (英文)
著者名 (author) M. Hashimoto,H. Onodera
英文著者名 (author)
編者名 (editor)
編者名 (英文)
キー (key)
書籍・会議録表題 (booktitle) Proceedings of the Ninth Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI)
書籍・会議録表題(英文)
巻数 (volume)
号数 (number)
ページ範囲 (pages) 115-121
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month) 4
出版年 (year) 2000
採択率 (acceptance)
URL
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
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BiBTeXエントリ
@inproceedings{id85,
         title = {A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis},
        author = {M. Hashimoto and H. Onodera},
     booktitle = {Proceedings of the Ninth Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI)},
         pages = {115-121},
         month = {4},
          year = {2000},
}