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M. Hashimoto, M. Takahashi, and H. Onodera, "Crosstalk Noise Optimization by Post-Layout Transistor Sizing," In Proceedings of ACM/IEEE International Symposium on Physical Design (ISPD), pp. 126-130, April 2002. | |
ID | 76 |
分類 | 国際会議 |
タグ | |
表題 (title) |
Crosstalk Noise Optimization by Post-Layout Transistor Sizing |
表題 (英文) |
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著者名 (author) |
M. Hashimoto,M. Takahashi,H. Onodera |
英文著者名 (author) |
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編者名 (editor) |
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編者名 (英文) |
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キー (key) |
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書籍・会議録表題 (booktitle) |
Proceedings of ACM/IEEE International Symposium on Physical Design (ISPD) |
書籍・会議録表題(英文) |
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巻数 (volume) |
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号数 (number) |
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ページ範囲 (pages) |
126-130 |
組織名 (organization) |
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出版元 (publisher) |
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出版元 (英文) |
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出版社住所 (address) |
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刊行月 (month) |
4 |
出版年 (year) |
2002 |
採択率 (acceptance) |
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URL |
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付加情報 (note) |
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注釈 (annote) |
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内容梗概 (abstract) |
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論文電子ファイル | 43.pdf (application/pdf) [一般閲覧可] |
BiBTeXエントリ |
@inproceedings{id76, title = {Crosstalk Noise Optimization by Post-Layout Transistor Sizing}, author = {M. Hashimoto and M. Takahashi and H. Onodera}, booktitle = {Proceedings of ACM/IEEE International Symposium on Physical Design (ISPD)}, pages = {126-130}, month = {4}, year = {2002}, } |