: Q. Cheng, L. Lin, M. Huang, Q. Li, Z. Yang, L. Dai, H. Yu, R. Zhang, Y. Chen, Y. Shi, and M. Hashimoto, A 22nm End-To-End Edge-AI Processor with Booth-Value-Confined Acceleration and Hardware-Aware Layer-Wise Model Deployment, 採録済.
Detail of a work
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| Q. Cheng, L. Lin, M. Huang, Q. Li, Z. Yang, L. Dai, H. Yu, R. Zhang, Y. Chen, Y. Shi, and M. Hashimoto, "A 22nm End-To-End Edge-AI Processor with Booth-Value-Confined Acceleration and Hardware-Aware Layer-Wise Model Deployment," IEEE Transactions on VLSI Systems, 採録済. | |
| ID | 698 |
| 分類 | 論文誌 |
| タグ | 22nm acceleration booth-value-confined deployment edge-ai end-to-end hardware-aware layer-wise model processor |
| 表題 (title) |
A 22nm End-To-End Edge-AI Processor with Booth-Value-Confined Acceleration and Hardware-Aware Layer-Wise Model Deployment |
| 表題 (英文) |
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| 著者名 (author) |
Quan Cheng,Longyang Lin,Mingqiang Huang,Qiufeng Li,Zhengke Yang,Liuyao Dai,Hao Yu,Ruilin Zhang,Yu-Jen Chen,Yiyu Shi,Masanori Hashimoto |
| 英文著者名 (author) |
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| キー (key) |
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| 定期刊行物名 (journal) |
IEEE Transactions on VLSI Systems |
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| ページ範囲 (pages) |
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| 刊行月 (month) |
0 |
| 出版年 (year) |
(to appear) |
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| 内容梗概 (abstract) |
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| 論文電子ファイル | 利用できません． |
| BiBTeXエントリ |
@article{id698,
title = {A 22nm End-to-End Edge-{AI} Processor with Booth-Value-Confined Acceleration and Hardware-Aware Layer-Wise Model Deployment},
author = {Quan Cheng and Longyang Lin and Mingqiang Huang and Qiufeng Li and Zhengke Yang and Liuyao Dai and Hao Yu and Ruilin Zhang and Yu-Jen Chen and Yiyu Shi and Masanori Hashimoto},
journal = {IEEE Transactions on VLSI Systems},
month = {0},
year = {(to appear)},
}
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