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A. Muramatsu, M. Hashimoto, and H. Onodera, "LSI Power Network Analysis with On-Chip Wire Inductance," In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pp. 55-60, October 2004. | |
ID | 59 |
分類 | 国際会議 |
タグ | analysis inductance lsi network on-chip power wire |
表題 (title) |
LSI Power Network Analysis with On-Chip Wire Inductance |
表題 (英文) |
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著者名 (author) |
A. Muramatsu,M. Hashimoto,H. Onodera |
英文著者名 (author) |
A. Muramatsu,M. Hashimoto,H. Onodera |
編者名 (editor) |
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編者名 (英文) |
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キー (key) |
A. Muramatsu,M. Hashimoto,H. Onodera |
書籍・会議録表題 (booktitle) |
Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI) |
書籍・会議録表題(英文) |
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巻数 (volume) |
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号数 (number) |
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ページ範囲 (pages) |
55-60 |
組織名 (organization) |
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出版元 (publisher) |
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出版元 (英文) |
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出版社住所 (address) |
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刊行月 (month) |
10 |
出版年 (year) |
2004 |
採択率 (acceptance) |
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URL |
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付加情報 (note) |
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注釈 (annote) |
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内容梗概 (abstract) |
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論文電子ファイル | 利用できません. |
BiBTeXエントリ |
@inproceedings{id59, title = {{LSI} Power Network Analysis with On-chip Wire Inductance}, author = {A. Muramatsu and M. Hashimoto and H. Onodera}, booktitle = {Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI)}, pages = {55-60}, month = {10}, year = {2004}, } |