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M. Hashimoto and Y. Masuda, "MTTF-aware Design Methodology for Adaptive Voltage Scaling (Invited)," Proceedings of China Semiconductor Technology International Conference (CSTIC), March 2018. | |
ID | 468 |
分類 | 国際会議 |
タグ | adaptive design invited methodology mttf-aware scaling voltage |
表題 (title) |
MTTF-aware Design Methodology for Adaptive Voltage Scaling (Invited) |
表題 (英文) |
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著者名 (author) |
M. Hashimoto,Y. Masuda |
英文著者名 (author) |
M. Hashimoto,Y. Masuda |
キー (key) |
M. Hashimoto,Y. Masuda |
定期刊行物名 (journal) |
Proceedings of China Semiconductor Technology International Conference (CSTIC) |
定期刊行物名 (英文) |
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巻数 (volume) |
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号数 (number) |
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ページ範囲 (pages) |
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刊行月 (month) |
3 |
出版年 (year) |
2018 |
Impact Factor (JCR) |
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URL |
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付加情報 (note) |
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注釈 (annote) |
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内容梗概 (abstract) |
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論文電子ファイル | pdf (application/pdf) [一般閲覧可] |
BiBTeXエントリ |
@article{id468, title = {{MTTF-aware} Design Methodology for Adaptive Voltage Scaling (Invited)}, author = {M. Hashimoto and Y. Masuda}, journal = {Proceedings of China Semiconductor Technology International Conference (CSTIC)}, month = {3}, year = {2018}, } |