: M. Hashimoto and H. Onodera, A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis, December 2000.
Detail of a work
| Tweet | |
| M. Hashimoto and H. Onodera, "A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, E83-A(12), pp. 2558-2568, December 2000. | |
| ID | 26 |
| 分類 | 論文誌 |
| タグ | |
| 表題 (title) |
A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis |
| 表題 (英文) |
|
| 著者名 (author) |
M. Hashimoto,H. Onodera |
| 英文著者名 (author) |
|
| キー (key) |
|
| 定期刊行物名 (journal) |
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences |
| 定期刊行物名 (英文) |
|
| 巻数 (volume) |
E83-A |
| 号数 (number) |
12 |
| ページ範囲 (pages) |
2558-2568 |
| 刊行月 (month) |
12 |
| 出版年 (year) |
2000 |
| Impact Factor (JCR) |
|
| URL |
|
| 付加情報 (note) |
|
| 注釈 (annote) |
|
| 内容梗概 (abstract) |
|
| 論文電子ファイル | 18.pdf (application/pdf) [一般閲覧可] |
| BiBTeXエントリ |
@article{id26,
title = {A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis},
author = {M. Hashimoto and H. Onodera},
journal = {IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences},
volume = {E83-A},
number = {12},
pages = {2558-2568},
month = {12},
year = {2000},
}
|