この検索内の頻出タグ: accelerator^:1 deep^:1 exploration^:1 multi-bit-width^:1 multi-precision^:1 networks^:1 neural^:1 optimization^:1 reliability^:1 synchronization^:1 system-on-chip^:1 timing^:1 virtual^:1 virtualsync+^:1

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論文誌

[1] Q. Cheng, M. Huang, C. Man, A. Shen, L. Dai, H. Yu, and M. Hashimoto, "Reliability Exploration of System-On-Chip with Multi-Bit-Width Accelerator for Multi-Precision Deep Neural Networks," IEEE Transactions on Circuits and Systems I: Regular Papers, volume 70, number 10, 3978 -- 3991, October 2023. [pdf]

[2] G. L. Zhang, B. Li, X. Huang, X. Yin, C. Zhuo, M. Hashimoto, and U. Schlichtmann, "Virtualsync+: Timing Optimization with Virtual Synchronization," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, volume 41, number 12, pages 5526-5540, December 2022. [pdf]