国際会議
[1] T. Cheng and M. Hashimoto, "Minimizing Energy of DNN Training with Adaptive Bit-Width and Voltage Scaling," Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), May 2021.
[2] T.-Y. Cheng, J. Yu, and M. Hashimoto, "Minimizing Power for Neural Network Training with Logarithm-Approximate Floating-Point Multiplier," Proceedings of International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), July 2019.